Michael G. Lohmeyer

840 Pretoria Court                                                                                                                          (408) 829-3074

San Jose CA 95127                                                                                                                                 email me

 

Objective:

A consulting or full time position in design and architecture of board and system related products.

 

Experience Summary:

 

 

(specific job experience on following pages)

I have 17 years hardware design experience as a full time and consulting engineer in the following areas:

 

Consumer Electronics and Multimedia Hardware Design

á     Embedded processor and multimedia designs for cell phones, PDAs, and other hand held battery powered applications - including audio, video, LCD, and peripherals.

á     Analog design experience with op-amps, CODECs, power supplies, and other basic analog circuits.

á     Design of low power, primary and rechargeable battery products including battery-charging circuits.

á     PC audio and PC multimedia controllers including all multimedia functions of a modern PC. 

 

Embedded Hardware Design

á     Experience with various embedded processors (8-bit, 16-bit, & 32-bit), ARM7 and ARM9.

á     Low power, battery operated circuits, and micro-power battery backed circuit design.

á     Embedded backplane and peripheral bus design.

á     Software design for embedded applications.

 

Networking Hardware, DSL, and Cable Modem Design Experience

á     Design of fault tolerant, high-speed digital boards for 10/100 and Gigabit Ethernet traffic concentrators, including high-speed memory (Rambus, SDRAM, and ZBT SRAM), network processors, high-speed serial switch fabric, and embedded control processors. 

á     Design of Ethernet controller boards for add in PC cards and network infrastructure equipment.

á     Cable Modem head end design and DSL cable modem design.

 

Architecture Definition and System Design

á     Skilled at architecture definition with focus on cost and user interface as well as function.

á     ÒFeasibility of DesignÓ studies for industrial and consumer level embedded products including BOM, cost analysis, mechanical and industrial design constraints, battery choice, and power consumption.

á     System on Chip interconnect and sub-function architecture definition for ASIC and FPGA applications.

á     Biometric Identification experience with Fingerprint and Voice Recognition products.

á     Hot swap and redundant architecture experience.

á     PCI, Compact PCI, Rambus, RapidIO, CSIX, FOCUS, ISA and proprietary bus architecture experience.

 

Applications Engineering

á     Design of evaluation and bring-up boards for various semiconductor companies including xDSL, Ethernet, PC Multimedia, Cell phone and PDA multimedia ICs.

á     Design of boards for turnkey, ready to manufacture kits (including schematics, PCB layout, emissions approval, and BOM intended for large scale production by OEM manufacturing houses).

á     Provided customer applications support including application notes, data sheets, reference designs, phone support, and FAE/Customer training.

 

High Speed Digital and Emissions Experience

á     Strong experience in EMI emissions related issues and FCC/CISPRR certification process.

á     Experience with Rambus memory, and other high-speed digital interfaces.

 

Software and Programmable Logic Design

á     Programming experience in multiple languages including C and assembly.

á     FPGA and CPLD design experience with Xilinx & Altera, using Verilog and custom languages.

 

Design Process

á     OrCAD CIS database and design process implementation, including creation of parts database, training and documentation for engineering staff. OrCAD and Viewlogic schematic capture experience.

á     Experience using PSpice for analog and mixed signal circuit analysis.

á     Familiarity with PCB layout software (Allegro and Pads PCB).

 

General Skills

á     Praised for having excellent communication, presentation, and writing skills.

á     Team oriented worker who motivates project teams toward successful products.

á     Adept with mechanical issues related to board, chassis, mechanical, and industrial design. Experience with 3D design software (Soildworks).

á     Diverse skill set a result of being a fast learner and detail oriented. I believe in educating my peers as much as learning from them to create an environment where everyone is more effective.

á     Over 20 years experience with computers, including Windows, Linux/Unix, Macintosh, programming, network architecture, protocols, applications, system administration, and engineering tools.

 

 

Experience:

Obvius, Portland, OR

CONSULTANT - DESIGN ENGINEER                                                              Nov. 2001 - Present

á   Responsible for design and testing of embedded products for ObviusÕ monitoring system, including Ethernet, RS-232, RS-485, RF networking, LCD display, battery backup, and analog inputs.

á   Used PSpice to design and analyze a multi-port DVM function for analog and digital input monitoring.

á   Designs implemented with ARM7/ARM9 and Rabbit Semiconductor based embedded processors.

á   Responsible for ARM7 Software written in C.

á   Evaluated and designed various switching and linear power supplies.

á   Performed cost/benefit analysis of various designs and features for Obvius products including power supply, off the shelf vs. custom designed SBC, component choice, cost vs. performance trade offs, regulatory certification, and manufacturing issues.

 

Gyration, Inc., Saratoga, CA

CONSULTANT – Design Engineer                                                                  Jul. 2004 – Jun. 2005

á   Responsible for design of several components of a wireless mouse, battery charger, keyboard, and USB RF receiver, including follow-on products and accessories.

á   Followed product from early design through testing and overseas manufacturing support.

á   Designed product using TI MSP430 Processor Family and Cypress WirelessUSB and PSoC Families.

 

Power Integrations, San Jose, CA

CONSULTANT - OrCAD CIS Implementation & Training                              Nov. 2003 - Mar. 2004

á   Provided consultation regarding implementation of PIÕs OrCAD CIS database and design process.

á   Wrote reference materials and provided training for engineering staff and FAEs.

 

Flextronics Corporation, Milpitas, CA

CONSULTANT - DESIGN ENGINEER                                                           Oct. 2003 - Dec. 2003

á   Wrote a design feasibility study for a consumer level pocket sized security device for biometric fingerprint and voice recognition, including a LI-ION battery powered, ARM based design with flash memory, fingerprint sensor, and voice recognition capability.

á   The report included cost analysis for high volume production, battery budget according to different usage patterns, and investigation into other possible features such as a breathalyzer and USB flash disk function.

 

MediaQ Incorporated (now nVidia), Santa Clara, CA

CONSULTANT - DESIGN ENGINEER                                         May - Oct. 2002, Jul. - Aug. 2003

á   Designed, documented and debugged several evaluation and debug boards for MediaQ silicon products including a seven slot back plane (including signal integrity issues), an Ethernet/Super I/O Peripheral card, a PCI interface adapter and an evaluation board for MediaQÕs newest silicon.

á   Defined feature requirements for MediaQ evaluation and debug boards. 

á   The boards implemented common functions for cell phone and PDA flat panel and multimedia acceleration.

á   Implemented component database (OrCAD CIS) to assist in BOM creation and defined design process around the database.

 

Ikanos Communications, Fremont, CA

CONSULTANT - DESIGN ENGINEER                                                          May 2003 - July 2003

á   Designed a debug and evaluation board for IkanosÕ next generation xDSL chip set, including interfaces for different memory systems, debug aids, external CPU integration, and interface variations for IkanosÕ physical layer interface devices for DSL applications.

 

Leopard Logic, Cupertino, CA

SENIOR SYSTEMS ENGINEER                                                                           Jan. - Mar. 2002

á   Defined a RapidIO Interface for FPGA and ASIC applications. Wrote a specification for development of a RapidIO core for System on Chip designs.

á   Presented RapidIO architecture to LeopardÕs key customer. 

á   Examined Leopard Logic FPGA development tools and documentation and provided bug reports and feedback. 

 

Inkra Networks, Fremont, CA

CONSULTANT - DESIGN ENGINEER                                                                  Jan. - Oct. 2001

á   Designed and managed two multi-function boards for InkraÕs carrier system for Internet data centers.

á   Board included: high-speed back plane switch fabric, network processors, Rambus memory, 10/100 and Gigabit Ethernet, MPC860 CPU, SDRAM, ZBT SRAM, CPLD, CSIX and Focus bus interfaces.

á   System design frequencies include: 2.65 GHz back plane switch fabric, 1.25 GHz PECL Gigabit Ethernet interface (TBI), 400 MHz (800 Mb/s) Rambus, 100 MHz ZBT SRAM, 40 MHz CPU sub-system.

á   Designed MPC860 CPU sub-system including interfacing incompatible bus architectures to CPU.

á   Assisted with creation of component database (OrCAD CIS) to streamline design process.

á   Created reliable process in OrCAD allowing two boards to be created from one schematic.

 

Luxxon Corporation, San Jose, CA

CONSULTANT - DESIGN ENGINEER                                                                         1999 - 2000

á   Main architect for MultiMediaCard (MMC) interface for LuxxonÕs LUX2 Multimedia Processor (for wireless and hand held devices).  Responsibilities included debug and MMC compliance testing.

á   Designed an FPGA development board for the LUX2. Responsible for design, fabrication, purchasing parts, documentation, and design of add-on daughter boards.

á   Provided early system architecture for LuxxonÕs Mediator Streaming System (a streaming media technology for wireless and mobile devices). Responsibilities included hot swap and redundancy as well as bandwidth demands in a video encoder/decoder application.

 

Terayon Communication Systems, Santa Clara, CA

MTS, DESIGN ENGINEER                                                                                          1998 - 1999

á   Designed multiple sub-systems on a complex Cable Modem head end product including: CPU interface, hot swap, redundancy, Compact PCI interface, power supply, interface to RF circuits and high-speed memory interface. Design effort encompassed three separate board designs for IC and architecture verification and design specifications for final products.

á   Designed FPGA based test bed for DOCSIS upstream packet processor, interfaced to a Motorola MPC8260 embedded processor.  Responsibilities included FPGA architecture definition, FPGA design, PCB circuit design, and mechanical issues.

á   Wrote requirements and design specifications for above-mentioned projects.

á   Defined and documented better procedures for TerayonÕs design process.

 

Chromatic Research, VLSI System Products, Sunnyvale, CA

MTS, DESIGN ENGINEER                                                                                          1996 - 1998

á   Designed processor based multimedia boards for the consumer and OEM market.  Designs included CODECs for audio, modem, display RAMDAC, NTSC Video in and out and more.

á   High frequency design and PCB layout experience with 300 MHz Rambus memory bus and 125 MHz multimedia processor.

á   Successful completion of FCC/CISPRR EMI emissions certification of above systems.

 

Advanced Micro Devices, Corporate Systems Engineering, Sunnyvale, CA

DESIGN ENGINEER                                                                                                   1994 - 1996

á   Designed PC Audio boards for the consumer and OEM market.  The boards were ready to manufacture design kits for AMD customers.

á   Mastered design of 2 and 4 layer PCBs with mixed analog and digital components.

á   Provided customer support on AMDÕs full product line through phone hotline including LAN/Ethernet devices, Flash memory, CPLD (Mach family), PLD products, and AMD processors.

 

National Semiconductor Corp., Local Area Networks, Santa Clara, CA

APPLICATIONS ENGINEER                                                                                       1990 - 1994

á   Main architect of Ethernet chip.  Conceived and designed the bus architecture, DMA, data path, FIFOs, system architecture and system software interface.

á   Designed mixed signal digital and analog PCBs for evaluation and demonstration purposes.

á   Presented product and technical information to customers and FAEs.

 

Education:

B.S. Electrical and Electronics Engineering, June 1990, Oregon State University